1. Field of the Invention
The invention relates in general to a multiplying analog-to-digital converter, and more particularly to a multiplying analog-to-digital converter without using a sample-and-hold circuit.
2. Description of the Related Art
With the rapid advance in technology, the pipeline analog-to-digital converter has been provided and widely used in various fields such as wireless transmission circuits and consumer digital electronic products. In general, the multi-bit pipeline analog-to-digital converter includes a pre-stage sample-and-hold circuit and at least one stage of multiplying analog-to-digital converter. The pre-stage sample-and-hold circuit samples an inputted analog signal to obtain a sample signal. The at least one stage of multiplying analog-to-digital converter coverts the sample signal to obtain a corresponding digital signal.
For the existing pipeline analog-to-digital converters, the pre-stage sample-and-hold circuit is realized by a capacitor having large capacitance and a power-consuming operation amplifier. Consequently, existing pipeline analog-to-digital converters have the problems of power consumption being too high and circuit area being too large. Therefore, how to provide suitable circuit design of pipeline analog-to-digital converter to resolve the above-mentioned problems has become a prominent task for the industries.